1. Field of the Invention
The present invention relates to a processor.
2. Description of the Related Art
When an interruption occurs or when a mode is switched to a sleep mode to reduce power consumption, a processor saves data stored in all registers or some registers used for a process in execution on the stack. When data stored in a plurality of registers are saved in this way, stack instructions are read from a program memory in accordance with the number of target registers to execute stack processes (e.g., Japanese Patent Application Laid-Open Publication No. 2003-345456).
Since a program has the stack instructions written for saving data of a plurality of registers, a program size is increased in accordance with the number of the registers.